JPS6347183B2 - - Google Patents

Info

Publication number
JPS6347183B2
JPS6347183B2 JP56149961A JP14996181A JPS6347183B2 JP S6347183 B2 JPS6347183 B2 JP S6347183B2 JP 56149961 A JP56149961 A JP 56149961A JP 14996181 A JP14996181 A JP 14996181A JP S6347183 B2 JPS6347183 B2 JP S6347183B2
Authority
JP
Japan
Prior art keywords
circuit
output
difference
controlled oscillator
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56149961A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5851655A (ja
Inventor
Susumu Sasaki
Hiroyuki Homitsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56149961A priority Critical patent/JPS5851655A/ja
Priority to EP19820304203 priority patent/EP0072241B1/en
Priority to DE8282304203T priority patent/DE3272570D1/de
Publication of JPS5851655A publication Critical patent/JPS5851655A/ja
Publication of JPS6347183B2 publication Critical patent/JPS6347183B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H04L27/227—Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2271—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
    • H04L27/2273—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals associated with quadrature demodulation, e.g. Costas loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
JP56149961A 1981-08-10 1981-09-22 搬送波再生回路 Granted JPS5851655A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP56149961A JPS5851655A (ja) 1981-09-22 1981-09-22 搬送波再生回路
EP19820304203 EP0072241B1 (en) 1981-08-10 1982-08-10 Carrier recovery circuit
DE8282304203T DE3272570D1 (en) 1981-08-10 1982-08-10 Carrier recovery circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56149961A JPS5851655A (ja) 1981-09-22 1981-09-22 搬送波再生回路

Publications (2)

Publication Number Publication Date
JPS5851655A JPS5851655A (ja) 1983-03-26
JPS6347183B2 true JPS6347183B2 (en]) 1988-09-20

Family

ID=15486381

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56149961A Granted JPS5851655A (ja) 1981-08-10 1981-09-22 搬送波再生回路

Country Status (1)

Country Link
JP (1) JPS5851655A (en])

Also Published As

Publication number Publication date
JPS5851655A (ja) 1983-03-26

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